00001 #ifndef __VTXPROG_COMMON_H__
00002 #define __SHADER_COMMON_H__
00003
00029 typedef struct _ShaderFunc ShaderFunc;
00030
00031 typedef enum {
00032 SRF_NONE,
00033 SRF_TEMP,
00034 SRF_ATTRIB,
00035 SRF_CONST,
00036 SRF_RESULT,
00037 SRF_ADDRESS,
00038 SRF_TEXUNIT,
00039 SRF_UNKNOWN
00040 } ShaderRegFile;
00041
00042 typedef enum {
00043 SOP_UNKNOWN = 0,
00044 SOP_NOP,
00045 SOP_ABS, SOP_ADD, SOP_ARA, SOP_ARL, SOP_ARR,
00046 SOP_BRA, SOP_BRK,
00047 SOP_CAL, SOP_CMP, SOP_COS,
00048 SOP_DDX, SOP_DDY, SOP_DIV, SOP_DP2, SOP_DP2A, SOP_DP3, SOP_DP4, SOP_DPH,
00049 SOP_DST,
00050 SOP_EX2, SOP_EXP,
00051 SOP_FLR, SOP_FRC,
00052 SOP_IF,
00053 SOP_KIL,
00054 SOP_LG2, SOP_LIT, SOP_LOG, SOP_LOOP, SOP_LRP,
00055 SOP_MAD, SOP_MAX, SOP_MIN, SOP_MOV, SOP_MUL,
00056 SOP_NRM,
00057 SOP_PK2H, SOP_PK2US, SOP_PK4B, SOP_PK4UB, SOP_POW, SOP_POPA, SOP_PUSHA,
00058 SOP_RCC, SOP_RCP, SOP_REP, SOP_RET, SOP_RFL, SOP_RSQ,
00059 SOP_SCS, SOP_SEQ, SOP_SFL, SOP_SGE, SOP_SGT, SOP_SIN, SOP_SLE, SOP_SLT,
00060 SOP_SNE, SOP_SSG, SOP_STR, SOP_SUB, SOP_SWZ,
00061 SOP_TEX, SOP_TXB, SOP_TXD, SOP_TXL, SOP_TXP,
00062 SOP_UP2H, SOP_UP2US, SOP_UP4B, SOP_UP4UB,
00063 SOP_X2D, SOP_XPD
00064 } ShaderOpcode;
00065
00066 typedef enum {
00067 SP_FLOAT32,
00068 SP_FLOAT16,
00069 SP_FIXED12,
00070 SP_UNKNOWN
00071 } ShaderPrecision;
00072
00073 typedef enum {
00074 SSC_X, SSC_Y, SSC_Z, SSC_W,
00075 } ShaderSwzComp;
00076
00077 typedef struct _ShaderRegSwz {
00078 ShaderSwzComp x, y, z, w;
00079 } ShaderRegSwz;
00080
00081 typedef enum {
00082 SR_POSITION,
00083 SR_WEIGHT,
00084 SR_NORMAL,
00085 SR_COL0,
00086 SR_COL1,
00087 SR_BFC0,
00088 SR_BFC1,
00089 SR_FOGCOORD,
00090 SR_POINTSZ,
00091 SR_TEXCOORD0,
00092 SR_TEXCOORD1,
00093 SR_TEXCOORD2,
00094 SR_TEXCOORD3,
00095 SR_TEXCOORD4,
00096 SR_TEXCOORD5,
00097 SR_TEXCOORD6,
00098 SR_TEXCOORD7,
00099 SR_FRAGDATA0,
00100 SR_FRAGDATA1,
00101 SR_FRAGDATA2,
00102 SR_FRAGDATA3,
00103 SR_UNKNOWN
00104 } ShaderFixedReg;
00105
00106 typedef enum {
00107 SC_FL, SC_LT, SC_EQ, SC_LE, SC_GT, SC_NE, SC_GE, SC_TR,
00108 SC_UNKNOWN
00109 } ShaderCond;
00110
00111 #define SMASK_X (1<<0)
00112 #define SMASK_Y (1<<1)
00113 #define SMASK_Z (1<<2)
00114 #define SMASK_W (1<<3)
00115 #define SMASK_ALL (SMASK_X|SMASK_Y|SMASK_Z|SMASK_W)
00116
00117 #define SPOS_ADDRESS 3
00118 #define SPOS_TEXUNIT 4
00119 struct _op_xlat {
00120 unsigned int NV;
00121 ShaderOpcode SOP;
00122 int srcpos[3];
00123 };
00124 #define MOD_OPCODE(t,hw,sop,s0,s1,s2) do { \
00125 t[hw].NV = hw; \
00126 t[hw].SOP = sop; \
00127 t[hw].srcpos[0] = s0; \
00128 t[hw].srcpos[1] = s1; \
00129 t[hw].srcpos[2] = s2; \
00130 } while(0)
00131
00132 extern unsigned int NVVP_TX_VOP_COUNT;
00133 extern unsigned int NVVP_TX_SOP_COUNT;
00134 extern struct _op_xlat NVVP_TX_VOP[];
00135 extern struct _op_xlat NVVP_TX_SOP[];
00136
00137 struct _ShaderFunc {
00138 unsigned int * inst;
00139 struct _op_xlat*(*GetOPTXRec) (ShaderFunc *, int merged);
00140
00141 int (*HasMergedInst) (ShaderFunc *);
00142 int (*IsLastInst) (ShaderFunc *);
00143 int (*GetOffsetNext) (ShaderFunc *);
00144
00145 int (*GetOpcodeSlot) (ShaderFunc *, int merged);
00146 unsigned int (*GetOpcodeHW) (ShaderFunc *, int slot);
00147 ShaderOpcode (*GetOpcode) (ShaderFunc *, int merged);
00148
00149 ShaderPrecision (*GetPrecision) (ShaderFunc *);
00150 int (*GetSaturate) (ShaderFunc *);
00151
00152 ShaderRegFile (*GetDestFile) (ShaderFunc *, int merged);
00153 unsigned int (*GetDestID) (ShaderFunc *, int merged);
00154 unsigned int (*GetDestMask) (ShaderFunc *, int merged);
00155
00156 unsigned int (*GetSourceHW) (ShaderFunc *, int merged, int pos);
00157 ShaderRegFile (*GetSourceFile) (ShaderFunc *, int merged, int pos);
00158 int (*GetSourceID) (ShaderFunc *, int merged, int pos);
00159 int (*GetSourceNegate) (ShaderFunc *, int merged, int pos);
00160 int (*GetSourceAbs) (ShaderFunc *, int merged, int pos);
00161 ShaderRegSwz (*GetSourceSwizzle) (ShaderFunc *, int merged, int pos);
00162 int (*GetSourceIndexed) (ShaderFunc *, int merged, int pos);
00163 void (*GetSourceConstVal) (ShaderFunc *, int merged, int pos, float *val);
00164 int (*GetSourceScale) (ShaderFunc *, int merged, int pos);
00165
00166 int (*GetRelAddressRegID) (ShaderFunc *);
00167 ShaderSwzComp (*GetRelAddressSwizzle) (ShaderFunc *);
00168
00169 int (*SupportsConditional) (ShaderFunc *);
00170 int (*GetConditionUpdate) (ShaderFunc *);
00171 int (*GetConditionTest) (ShaderFunc *);
00172 ShaderCond (*GetCondition) (ShaderFunc *);
00173 ShaderRegSwz (*GetCondRegSwizzle) (ShaderFunc *);
00174 int (*GetCondRegID) (ShaderFunc *);
00175
00176 int (*GetBranch) (ShaderFunc *);
00177 int (*GetBranchElse) (ShaderFunc *);
00178 int (*GetBranchEnd) (ShaderFunc *);
00179
00180 int (*GetLoopCount) (ShaderFunc *);
00181 int (*GetLoopInitial) (ShaderFunc *);
00182 int (*GetLoopIncrement) (ShaderFunc *);
00183 };
00184
00185 extern void NV20VPInitShaderFuncs(ShaderFunc *);
00186 extern void NV30VPInitShaderFuncs(ShaderFunc *);
00187 extern void NV40VPInitShaderFuncs(ShaderFunc *);
00188
00189 extern void NV30FPInitShaderFuncs(ShaderFunc *);
00190
00191 #endif
